sense amplifier

英 [sens ˈæmplɪfaɪə(r)] 美 [sens ˈæmplɪfaɪər]

网络  灵敏放大器; 读出放大器; 放大器; 感测放大器; 感应放大器

计算机



双语例句

  1. A novel current mode sense amplifier with high read-speed for non-volatile memory application is developed.
    对此,设计出一种具有较快读取速度的新型电流灵敏放大器。
  2. The sense amplifier's hierarchical architecture can be used, not only to make the signals amplified to true digital signals, but also to add the drive of the circuits.
    利用两级敏感放大器的层次式结构,一方面使第一级放大的信号成为真正的数字信号,另一方面增加了电路的驱动能力。
  3. A column decoder outputs activation signals to activate the sense amplifier circuits.
    列解码器输出用于激活检测放大器电路的激活信号。
  4. The semiconductor memory device includes a bit line sense amplifier connected to a pair of bit lines.
    该半导体存储器件包含连接到一对位线的位线感测放大器。
  5. Timing adjusting circuits have a ferroelectric capacitor for timing adjustment in transmitting the activation signals output from the column decoder to the sense amplifier circuits.
    定时调整电路具有铁电电容器,用于在把从列解码器输出的激活信号发送到检测放大器电路时进行定时调整。
  6. Design of a Novel Current Mode Sense Amplifier in Deep Sub-micro Technology
    一种新型深亚微米电流灵敏放大器的设计电容式微音器的放大器微场电机放大器激磁机
  7. As shown in Fig.1 and Fig.1, an example of a sense amplifier is illustrated.
    如在图1及图1中所示,图解说明一检测放大器的实例。
  8. Design of a High-Speed and Automatically Swiched Precharge Sense Amplifier
    一种高速自控预充电灵敏放大器的设计
  9. The read state power consumption is optimized using a new sense amplifier structure and an optimized control circuit.
    芯片实现块编程和擦写功能,通过提出一种新型的敏感放大器而实现了读功耗的优化。
  10. A capacitor-coupling differential logic circuit handling the output of a differential circuit using coupling capacitors and sense amplifier.
    一种电容耦合差动逻辑电路,其中主要是利用耦合电容以及感测放大器的作用,来处理一差动电路部份的输。
  11. The circuit is divided into full bridge module, charge sense amplifier module, correlated double sampling and holding module, closed-loop feedback module, low-pass filter and time controlling module.
    检测电路分为全桥平衡模块、电荷放大器模块、信号放大模块、相关双采样模块、采样保持模块、闭环反馈模块、低通滤波模块和数字时序控制模块。
  12. In various embodiments of the invention, a memory device includes at least one sense amplifier with an asymmetrical configuration.
    在本发明的各实施例中,一种存储装置包含呈不对称配置的至少一个检测放大器。
  13. The sense amplifier is used to amplify and output the voltage difference on the internal; signal at the internal terminal.
    感测放大器则用来放大在内部端点上的内部信号电压差并且输出。
  14. Some suggestions of improving the sense amplifier design are made.
    本文还对读出放大器的设计提出了若干改进建议。
  15. A High-Speed and Low-Voltage Current Mode Sense Amplifier
    一种快速、低压的电流灵敏放大器的设计
  16. High speed is achieved by using current mode techniques, which include designing optimum register cell, new high speed current sense amplifier and sense amplifier control signal generator.
    在电流工作方式下,通过设计优化的存储单元、新型高速电流灵敏放大器以及一种灵敏放大器控制信号产生电路,提高了寄存器堆的读取速度。
  17. A fast access time is achieved by using six-transistor CMOS memory cell, latched sense amplifier, and high-speed decoder circuit.
    存储器采用六管CMOS存储单元、锁存器型敏感放大器和高速译码电路,以期达到最快的存取时间。
  18. Two-level sense amplifier amplifies the tiny voltage difference between the bit lines and enhances the anti-jamming ability.
    两级敏感放大器的应用在确保对位线微小电压差的放大的条件下,提高了抗干扰能力。
  19. Design of Sense Amplifier in Flash Memory
    FlashMemory中灵敏放大器的设计
  20. The crucial path includes address buffer, decoder, memory unit, sense amplifier and output buffer.
    其中包括地址缓冲、译码器、存储单元、灵敏放大器和输出缓冲电路。
  21. Using simulation techniques, we have made some improvement for design of the sense amplifier.
    借助于计算机的模拟计算,对于读出放大器的设计作了一些改进。
  22. Design of a Novel Structure of Sense Amplifier and Address Decoder Applied in a SRAM
    SRAM中新型结构的灵敏放大器及地址译码器的设计
  23. In this paper, a high-speed and low-voltage current-mode sense amplifier for nonvolatile memory is presented.
    提出了一种快速和低工作电压的非挥发性存储器的电流灵敏放大器。
  24. A Transient Analysis and Design of the Sense Amplifier of Single transistor Cell MOS RAM
    单管单元MOSRAM读出放大器的瞬态分析与设计
  25. The memory, decoder and sense amplifier circuit are designed and optimized.
    设计和优化了存储电路、译码电路、敏感放大电路。
  26. Voltage sense amplifier is added in the read path to reduce the access latency and power.
    读电路采用电压灵敏放大技术以降低读延时。
  27. In the work, SRAM is designed with multi-bank partitions. In order to improve the SRAM performance, the critical paths are optimized through multi-level decoding, sense amplifier and comparing circuit optimizing.
    在课题研究中对SRAM进行了分体设计,并对关键电路进行了修改和优化,包括采用多级译码、改进灵敏放大器、优化比较电路等措施提高SRAM的性能。
  28. Advanced technologies, such as dynamic CMOS decoder which using SCL ( source-coupled-logic) circuits, pulse signal technology, latch type voltage sense amplifier, power gating, memory array segmentation are used in the design.
    设计中采用了SCL(source-coupled-logic)结构的动态CMOS译码电路、脉冲信号技术、锁存型电压灵敏放大器、PowerGating、存储阵列分割等先进技术。
  29. Based on the analysis of offset voltage, this paper proposed a new low offset voltage sense amplifier which balanced the discharge speed of the internal nodes by adding two fine-tuning way in order to achieve the purpose of reducing the sense amplifier input offset voltage.
    在失调电压分析的基础上,提出了一种新的低失调电压的灵敏放大器,通过增加两条微调之路来平衡灵敏放大器的内部节点的放电速度,以达到降低灵敏放大器输入失调电压的目的。
  30. The sense amplifier sample circuit is also designed carefully, especially the size of the transistor circuit need to be optimized and adjusted continuously. We should also pay more attention to match the device and reduce process errors in layout.
    其中的灵敏放大器采样电路也是经过仔细设计的,尤其是电路中晶体管的尺寸参数要不断优化和调整,版图上也要特别注意器件的匹配,减小工艺误差。